1. Field of the Invention
The present invention relates to sample analysis by means of charged particle beams, and, in particular, to sample preparation for electron microscope analysis of semiconductor devices.
2. Description of the Related Art
The manufacturing process of integrated circuits involves the fabrication of numerous semiconductor elements such as insulated gate field-effect transistors or metal-oxide semiconductor field-effect transistors (MOSFETs) within a small chip area. In order to increase integration density and improve device performance, for instance, with respect to signal processing time and power consumption, feature sizes of the transistor structures are steadily decreasing. At the same time, economic constraints require a high yield and throughput in manufacturing the semiconductor devices, while, on the other hand, high quality and reliability of the end products are of great importance. Accordingly, a modern process flow for fabricating cutting-edge semiconductor devices implements a plurality of methodologies and analyzing methods to guarantee product quality.
Important ways of analyzing material properties, as well as structural characteristics of the semiconductor device, during various manufacturing stages, include those physical methods that allow ions, electrons, and/or electromagnetic radiation to interact with matter and then examine the secondary particles and/or radiations that are produced. The information obtained from the interaction of the particles and/or radiation with a region of interest in the semiconductor device is then used to deduce the properties of the materials in the region of interest.
Typical instruments widely used in the field of semiconductor manufacturing are electron microscopes, which may be classified into Scanning Electron Microscopes (SEM), Transmission Electron Microscopes (TEM), and Auger Electron Spectrometers (AES). The TEM analysis is steadily gaining importance, in particular, since transmission of electrons through a sample allows, in addition to obtaining information via localized atomic properties, obtaining information via diffraction mechanisms, which, in turn, provide information concerning longer-range order. Unfortunately, sample preparation for TEM analysis is difficult and time-consuming, since the thickness of the sample must not exceed about 100 nm to yield meaningful results.
To prepare cross-sectional samples having the required small thickness of 100 mn and less, several techniques have been used in the prior art. A typical method includes grinding, dimpling, and Ar.sup.+ -ion milling of the sample. This technique, however, is very time-consuming and, therefore, not suited for rapidly gathering information regarding the manufacturing process. Furthermore, it is difficult to determine the local position of the cross-section with respect to the device structure being investigated.
A further preparation technique includes the cutting and thinning of samples by means of a focused ion beam (FIB), which, in general, allows relatively fast sample preparation, and has, therefore, become the preferred method of sample preparation for TEM analysis. Moreover, this method allows a lateral orientation on the sample so that the cross-section can be prepared in a selected area, at least within certain boundaries, of the portion of the semiconductor device to be analyzed. In a typical preparation process including the FIB technique, a sample has initially been cut and thinned to provide a sample having opposing side surfaces that represent a cross-section of a device structure to be investigated. The thinning process is carried out until a cross-sectional thickness, i.e., a distance between the two opposing side surfaces, has been reduced to a thickness of about 30 to 50 .mu.m. Then, a metal layer has to be deposited on the top surface of the sample forming a cutting line for the subsequent focused ion beam operation. The metal layer, preferably consisting of Pt or W, may be deposited by any appropriate deposition method or, preferably, by means of the FIB apparatus using a low beam intensity. The sample having the metal layer as a cutting line on its top surface is then exposed to the high intensity focused ion beam that orthogonally impinges the metal layer. By scanning the focused ion beam across the top surface, sample material is continuously removed, thereby gradually reducing the cross-sectional thickness of the sample until the final thickness required for TEM analysis is obtained.
The preparation process described above, however, requires a planar top surface for depositing the metal layer as the cutting line without any defects to achieve appropriately formed side surfaces suitable for the transmitting electron beam of the TEM.
Due to the ever-decreasing device features, however, investigation of device structures containing openings, such as via chains and trenches that have to be filled by a dual damascene process or local interconnects, is required in fabricating high quality devices. These structures, however, do not have a planar top surface, and, when subjected to the FIB process, thus result in poor cross-section samples for TEM analysis. As a consequence, sample preparation for TEM analysis of openings in a semiconductor structure has been difficult and time-consuming and, thus, a cost-intensive procedure.
In view of the above, there exists a need for an improved method of preparing a sample for cross-sectional analysis, providing high yield and samples of high quality.